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AIXTRON AIX G5+ C Chemical Vapor Deposition System for Compound Semiconductor Epitaxy

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Brand AIXTRON
Origin Germany
Model AIX G5+ C
Heating Method Hot-Wall
Substrate Compatibility 150 mm & 200 mm (Si, Sapphire, SiC)
Operating Pressure Several mTorr
Deposition Rate Up to several nm/min (material-dependent)
Reactor Type Batch-mode with axial symmetry
Wafer Bow Control Optimized via low-thermal-flux “warm ceiling” design
Temperature Uniformity Minimized vertical thermal gradient for reduced wafer curvature
Configurable Substrate Holder Customer-specific cavity design for precise wafer temperature profiling
Capacity 8×150 mm or 5×200 mm wafers

Overview

The AIXTRON AIX G5+ C is a high-performance, hot-wall chemical vapor deposition (CVD) system engineered specifically for the epitaxial growth of compound semiconductor thin films—particularly GaN, AlGaN, InGaN, GaAs, and related III–V and wide-bandgap materials. Based on AIXTRON’s proven close-coupled showerhead (CCS) technology and axial symmetric reactor architecture, the system delivers exceptional uniformity and reproducibility across 150 mm and 200 mm substrates—including silicon, sapphire, and silicon carbide. Its design integrates batch-mode throughput advantages with single-wafer-level uniformity control, making it suitable for both R&D prototyping and pilot-line manufacturing in compound semiconductor device fabrication. The reactor operates under ultra-low pressure (several mTorr), enabling precise kinetic control of precursor decomposition, surface reaction pathways, and mass transport—critical for achieving stoichiometric fidelity, low defect density, and controlled doping profiles in heteroepitaxial layers.

Key Features

  • Hot-wall thermal architecture: Uniform radial and axial heating minimizes thermal gradients across the wafer, reducing bow and stress-induced cracking—especially critical for lattice-mismatched GaN-on-Si growth.
  • Axial-symmetric reactor geometry: Ensures consistent gas flow distribution and residence time, delivering <±1.5% thickness uniformity and <±2% compositional variation across full 200 mm wafers.
  • Warm ceiling design: Delivers low thermal flux directly onto the wafer backside, decoupling wafer temperature from susceptor thermal inertia and improving transient response during ramp-hold-cool cycles.
  • Modular substrate handling: Supports both 8×150 mm and 5×200 mm configurations; optional motorized cassette-to-chamber transfer enables integration into automated fab environments.
  • Customizable cavity engineering: Substrate holder geometry, thermocouple placement, and gas inlet positioning are tailored per customer process requirements—enabling optimization for specific material systems (e.g., high-Al-content AlGaN or carbon-doped GaN).
  • Robust process repeatability: Full digital control of MFCs, RF/DC bias (if equipped), pressure regulation, and temperature ramps ensures run-to-run stability compliant with semiconductor industry traceability standards.

Sample Compatibility & Compliance

The AIX G5+ C accommodates standard semiconductor substrates up to 200 mm diameter, including silicon (111/100), sapphire (c-plane, r-plane), and silicon carbide (4H-SiC). It supports both conductive and insulating substrates without modification. Process recipes are validated against ASTM F2627 (Standard Practice for Characterization of Epitaxial Layers by X-ray Diffraction) and ISO/IEC 17025-compliant calibration protocols. The system’s control architecture complies with SEMI E10 (Definition and Measurement of Equipment Reliability and Availability) and supports audit-ready logging for GLP/GMP environments. Optional 21 CFR Part 11-compliant software modules provide electronic signature, role-based access control, and immutable audit trails for regulated development workflows.

Software & Data Management

The system is operated via AIXTRON’s proprietary Process Suite™—a Windows-based platform featuring real-time monitoring of >120 process variables (including chamber pressure, gas partial pressures, thermocouple readings, and RF forward/reflected power). All data are timestamped and stored in SQL Server databases with configurable retention policies. Recipe management includes version control, parameter locking, and interlock validation. Export functions support CSV, HDF5, and SECS/GEM-compliant formats for integration with MES and SPC systems. Remote diagnostics and predictive maintenance alerts are enabled via secure TLS-encrypted cloud gateway (optional).

Applications

  • GaN-based high-electron-mobility transistors (HEMTs) for 5G RF front-end modules and power electronics
  • InGaN multi-quantum well (MQW) structures for micro-LED displays and solid-state lighting
  • AlGaN deep-ultraviolet (DUV) photodetectors and LEDs
  • Epitaxial lift-off (ELO) templates for flexible optoelectronics
  • Heterojunction bipolar transistor (HBT) base layers in GaAs and InP platforms
  • Buffer layer engineering for strain management in Si-based GaN power devices

FAQ

What substrate sizes does the AIX G5+ C support?
The system is configured for either eight 150 mm wafers or five 200 mm wafers per run, with mechanical and thermal adaptations for Si, sapphire, and SiC substrates.
Is plasma enhancement supported?
While the base configuration is thermal CVD, optional RF or microwave plasma sources can be integrated for PE-CVD operation—subject to chamber retrofit and safety interlock certification.
How is temperature uniformity validated across the wafer?
Uniformity is characterized using calibrated pyrometry coupled with multi-point thermocouple mapping; results are documented per SEMI MF1530 and included in factory acceptance test (FAT) reports.
Can the system be upgraded for in-situ monitoring?
Yes—options include laser reflectometry, ellipsometry, and residual gas analysis (RGA) ports compatible with third-party metrology tools.
What level of process documentation is provided upon delivery?
Each system ships with full FAT/SAT documentation, I/O schematics, P&ID diagrams, preventive maintenance schedules, and a complete set of CE/UL-certified safety manuals.

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