SAMCO RIE-800BCT Inductively Coupled Plasma Deep Reactive Ion Etcher

Overview

The SAMCO RIE-800BCT is a production-grade deep reactive ion etcher (DRIE) engineered for high-precision, high-throughput silicon micromachining in semiconductor and MEMS manufacturing environments. It employs an inductively coupled plasma (ICP) source to generate high-density, low-pressure plasma—enabling independent control of ion energy (via bias RF) and ion flux (via ICP RF). This decoupling is fundamental to achieving both high etch rates (>5 µm/min for Si in Bosch or cryogenic processes) and exceptional profile fidelity, including vertical sidewalls, sub-micron uniformity, and aspect ratios exceeding 100:1. Unlike capacitively coupled systems, the ICP architecture delivers superior plasma density uniformity across 8-inch wafers, minimizing center-to-edge variation and supporting repeatable process transfer from R&D to high-volume production. The system is purpose-built for silicon substrates—including bulk Si, SOI, and compound semiconductors—and operates under controlled vacuum conditions (base pressure <5×10⁻⁷ Torr) with precise gas delivery (SF₆, C₄F₈, O₂, Ar, Xe) and temperature-regulated electrostatic chucks (−20 °C to +80 °C).

Key Features

• Independent ICP/Bias RF Control: Enables simultaneous optimization of etch rate, selectivity (Si:mask >100:1 with SiO₂ or SiN masks), and anisotropy without trade-offs.
• Advanced Process Flexibility: Supports both Bosch-type (cyclic SF₆/C₄F₈) and cryogenic DRIE modes, as well as hybrid and pulsed-bias protocols for reduced notching and improved sidewall passivation.
• Sub-Micron Profile Control: Integrated endpoint detection (optical emission spectroscopy, OES) and real-time chamber impedance monitoring allow closed-loop adjustment of pulse timing and gas flow during etch steps.
• SOI-Specific Bias Pulse Management: Programmable bias pulsing mitigates notch formation at buried oxide interfaces—critical for high-yield SOI MEMS fabrication.
• Tilt & Rotation Compensation: Motorized wafer stage with ±5° programmable tilt and 360° rotation enables controlled sidewall angle tuning (e.g., for fluidic channel beveling or stress relief in actuators).
• Production-Ready Automation: SECS/GEM-compliant interface, recipe management with version control, and full audit trail logging compliant with ISO 9001 and internal GLP workflows.

Sample Compatibility & Compliance

The RIE-800BCT accommodates standard semiconductor wafers up to 200 mm (8 inch) diameter, including bare silicon, thermally oxidized wafers, LPCVD/PECVD-deposited SiO₂ and SiN masks, metal hard masks (Al, Cr, Ni), and patterned photoresist layers. It supports batch processing with load-lock configuration for continuous throughput and minimal air exposure. All wet-chemical pre-clean compatibility (e.g., SC1, RCA, piranha) is validated per SEMI F47 guidelines. The system meets CE marking requirements (2014/30/EU EMC Directive, 2014/35/EU LVD Directive) and is designed for integration into ISO 14644-1 Class 5–7 cleanrooms. Chamber materials (alumina-coated aluminum, quartz, stainless steel) ensure minimal metallic contamination—verified via vapor-phase decomposition (VPD)-ICP-MS testing per SEMI C37.

Software & Data Management

Operation is managed via SAMCO’s proprietary ETS (Etch Technology Suite) software, running on a Windows-based industrial PC with deterministic real-time kernel. ETS provides full parameter logging (RF forward/reflected power, chamber pressure, gas flows, chuck temperature, OES intensity traces) at 100 Hz sampling resolution. All process data—including operator ID, timestamp, recipe version, and fault logs—are stored in encrypted SQLite databases with configurable retention policies. Audit trails comply with FDA 21 CFR Part 11 requirements when configured with electronic signatures and role-based access control (RBAC). Data export supports CSV, XML, and direct OPC UA integration for MES/SCADA systems.

Applications

• MEMS Fabrication: High-aspect-ratio trenches for accelerometers, gyroscopes, pressure sensors, and micro-mirrors; release etching of polysilicon structures with minimal stiction.
• TSV Manufacturing: Through-silicon vias for 2.5D/3D IC packaging, with depth uniformity <±1.5% across wafer and sidewall roughness <2 nm RMS.
• Power Device Structuring: Deep trench etching for superjunction MOSFETs and IGBTs, enabling optimized electric field distribution and reduced on-resistance.
• Microfluidics & Lab-on-Chip: Precision etching of nozzles, manifolds, and mixing chambers in silicon/glass substrates with reproducible dimensional control.
• Optoelectronic Packaging: Alignment trench formation for flip-chip bonding and optical waveguide coupling structures.

FAQ

What plasma source technology does the RIE-800BCT use, and why is it preferred for DRIE?
It uses an inductively coupled plasma (ICP) source, which provides higher plasma density and lower ion energy spread than capacitive coupling—enabling independent control of etch rate and profile anisotropy.
Can the system process SOI wafers without bottom oxide erosion?
Yes. Its programmable bias pulsing and endpoint detection minimize undercut at the Si/SiO₂ interface, preserving device layer integrity during deep etch.
Is the RIE-800BCT compatible with existing fab automation standards?
Yes. It supports SECS/GEM communication, HSMS connectivity, and integrates with factory host systems via standard TCP/IP and OPC UA protocols.
What maintenance intervals are recommended for the ICP source and RF matching network?
SAMCO recommends quarterly preventive maintenance for RF components and quarterly inspection of the ICP coil cooling circuit, with full chamber cleaning every 500 hours of operation.
Does the system support process qualification for ISO 13485 or automotive AEC-Q200 compliance?
Yes. Documentation packages—including IQ/OQ/PQ protocols, traceable calibration records, and failure mode analysis (FMEA)—are available upon request for regulated industry validation.