TSD TSC-100 / TSC-300S / TSC-200L Post-CMP Wet Cleaning System

Overview

The TSD TSC-series post-CMP wet cleaning systems are engineered for high-precision removal of residual slurry, metal ions, abrasive particles, and organic contaminants from silicon, compound semiconductor, and advanced substrate wafers following chemical mechanical polishing (CMP). These systems implement a validated multi-stage wet process sequence grounded in fluid dynamics, surface tension control, and controlled mechanical interaction—critical for preserving post-CMP surface integrity while achieving sub-nanometer particle removal efficiency. Unlike generic wafer cleaners, the TSC platform is purpose-built to address the unique topography-sensitive contamination profile left after CMP, where embedded silica or ceria abrasives, metal hydroxides (e.g., Cu(OH)₂, Ta₂O₅), and polymer-based planarization byproducts require synergistic physical and chemical action. The system operates under ISO Class 1–5 cleanroom-compatible conditions and supports integration into front-end semiconductor fabrication lines via SECS/GEM-compliant interfaces.

Key Features

• Modular architecture supporting three operational configurations: single-station (TSC-100), indexing (TSC-300S), and fully inline cassette-to-cassette (TSC-200L) with dual-arm robotic handling—enabling seamless integration into automated material handling systems (AMHS).
• Dual-side polyvinyl alcohol (PVA) brush scrubbing with independent pressure and rotational speed control (0–300 rpm), ensuring uniform mechanical shear across 4–12 inch wafers without edge chipping or pattern damage.
• Optional megasonic energy delivery (≥950 kHz) integrated upstream of final rinse, generating cavitation-free acoustic streaming for sub-100 nm particle lift-off without surface erosion.
• Multi-zone nitrogen blow-off manifold with laminar flow nozzles and programmable dwell time, followed by high-G spin drying (>3000 rpm) to achieve <0.1 µL residual moisture per wafer.
• PLC-based control system with industrial-grade HMI touchscreen interface, supporting recipe-driven operation, real-time parameter logging, and audit-trail-capable event history (aligned with GLP/GMP documentation requirements).
• Compact footprint design (<1.2 m² for TSC-100; <2.8 m² for TSC-200L inline configuration), minimizing cleanroom floor space consumption while maintaining full process capability.

Sample Compatibility & Compliance

The TSC-series accommodates standard SEMI-standard wafer cassettes (FOUP/FOSB compatible on TSC-200L) and supports substrates including Si, SiC, GaN, SOI, and glass wafers. Mechanical adaptability is achieved through tooling plate interchangeability and adjustable chuck vacuum zoning—enabling rapid reconfiguration between 4-inch and 12-inch formats without hardware modification. All wetted components (nozzles, brushes, tanks, piping) are fabricated from high-purity PVDF, PFA, or electropolished 316L stainless steel to prevent metallic leaching and meet SEMI F57 purity specifications. The system complies with CE machinery directive (2006/42/EC), IEC 61000-6-2/6-4 EMC standards, and supports validation protocols aligned with ISO 9001, ISO 14644-1, and SEMI S2/S8 safety guidelines.

Software & Data Management

The embedded control software provides full recipe management with up to 99 user-defined process sequences, each storing parameters for brush rotation, DIW flow rate (0.5–5.0 L/min), N₂ pressure (0.2–0.6 MPa), spin acceleration ramp profiles, and megasonic duty cycle (if equipped). All operational data—including timestamped start/stop events, sensor readings (flow, pressure, temperature), and alarm logs—are stored locally in CSV format and exportable via Ethernet or USB. Audit trail functionality records operator ID, parameter changes, and manual overrides—meeting foundational requirements for FDA 21 CFR Part 11 compliance when deployed in regulated environments. Remote diagnostics and firmware updates are supported via secure TLS-enabled network connection.

Applications

• Post-CMP cleaning of copper/low-k interconnect wafers prior to barrier layer deposition or etch.
• Removal of residual ceria-based slurries from STI or shallow trench isolation wafers.
• Particle reduction after tungsten CMP in contact/via applications—critical for reducing defect density in <28 nm node processes.
• Pre-epitaxy cleaning of SiC and GaN substrates to eliminate polishing-induced subsurface damage and carbonaceous residues.
• Reclamation cleaning of test wafers and monitor wafers used in CMP tool qualification and process stability monitoring.

FAQ

Does the TSC-200L support FOUP-to-FOUP transfer?
Yes—the TSC-200L inline configuration integrates with standard 25-wafer FOUPs and supports SECS/GEM communication for automated lot dispatch and status reporting.
Is megasonic cleaning available as a factory-installed option or field retrofit?
Megasonics is offered as a configurable factory option for all TSC models; field retrofit requires recalibration and mechanical alignment verification per SEMI E173.
What DI water quality is required for optimal performance?
Resistivity ≥18.2 MΩ·cm at 25 °C, TOC <1 ppb, and particle count <1 particle/mL (>0.1 µm) per ASTM D5127—consistent with Class 1 ultrapure water specifications.
Can the system be validated for use in a GMP-certified facility?
Yes—TSD provides IQ/OQ documentation templates, FAT/SAT protocols, and calibration certificates traceable to NIST standards to support regulatory validation activities.
What maintenance intervals are recommended for PVA brushes?
Brush replacement is recommended every 500–800 wafers processed, depending on slurry composition and scrub pressure; wear monitoring is supported via optional force-sensing brush mounts.