Al2O3 + Al₀.₁Ga₀.₉N Epitaxial Template on Sapphire Substrate (p-type Mg-doped)
| Brand | Hefei Kejing |
|---|---|
| Origin | Anhui, China |
| Manufacturer Type | Authorized Distributor |
| Origin Category | Domestic |
| Model | Al₂O₃ + Al₀.₁Ga₀.₉N Film |
| Price | Upon Request |
| Crystal Orientation | c-axis (0001) ±1.0° |
| Conductivity Type | p-type (Mg-doped) |
| Film Thickness | 200 nm ±20 nm |
| Surface Finish (Front) | As-grown Ga-face |
| Surface Finish (Back) | As-received sapphire |
| Usable Area | >90% |
| Edge Exclusion | 1 mm |
| Packaging | Class 1000 cleanroom + Class 100 clean paper vacuum packaging or individual wafer cassette |
Overview
The Al₂O₃ + Al₀.₁Ga₀.₉N epitaxial template on sapphire substrate is a high-purity, lattice-matched heterostructure engineered for the fabrication of wide-bandgap optoelectronic and power electronic devices. This p-type Mg-doped template integrates a single-crystal aluminum oxide (sapphire) substrate with a thin, compositionally controlled AlGaN buffer layer, optimized to serve as a foundational platform for subsequent GaN-based device epitaxy—particularly for vertical or lateral p-n junction structures requiring low-resistance ohmic contact formation and enhanced hole injection efficiency. The c-axis (0001) orientation of the sapphire substrate ensures consistent crystallographic alignment across the entire film, minimizing threading dislocation density in overgrown layers. Designed for integration into metalorganic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE) processes, this template supports reproducible growth of high-electron-mobility transistors (HEMTs), ultraviolet light-emitting diodes (UV-LEDs), and high-voltage Schottky barrier diodes.
Key Features
- High-quality epitaxial Al₀.₁Ga₀.₉N layer grown on c-plane sapphire with precise compositional control (Al:Ga = 1:9 atomic ratio)
- p-type conductivity achieved via controlled Mg doping during epitaxial growth, enabling direct integration into p-channel device architectures
- Uniform film thickness of 200 nm ±20 nm across 2-inch diameter wafers, verified by spectroscopic ellipsometry and X-ray reflectivity
- Surface integrity maintained through as-grown Ga-face front surface and native sapphire backside finish—no post-deposition polishing or etching
- Usable area exceeding 90% with standardized 1 mm edge exclusion zone, compatible with standard photolithography and wafer probing workflows
- Class 1000 cleanroom fabrication environment and Class 100 clean paper vacuum packaging ensure particulate contamination <0.5 µm ≤ 100 particles/cm²
Sample Compatibility & Compliance
This epitaxial template is compatible with industry-standard 2-inch (50.8 mm) semiconductor processing tools, including MOCVD reactors (e.g., AIXTRON G3, Veeco K465i), e-beam evaporators, and reactive ion etchers. The sapphire substrate exhibits thermal stability up to 1000 °C under inert or N₂ ambient, supporting high-temperature annealing steps required for Mg activation. All wafers undergo post-growth characterization—including Hall effect measurement, secondary ion mass spectrometry (SIMS), and high-resolution X-ray diffraction (HR-XRD)—to verify carrier concentration (>1×10¹⁷ cm⁻³), mobility (>5 cm²/V·s), and crystalline quality (rocking curve FWHM < 300 arcsec for (0002) reflection). While not certified to ISO 9001 or IATF 16949 at the wafer level, the manufacturing process adheres to documented cleanroom SOPs aligned with SEMI standards for compound semiconductor substrates.
Software & Data Management
No embedded firmware or proprietary software is associated with this passive epitaxial template. However, full metrology datasets—including thickness maps, surface roughness profiles (AFM RMS < 0.3 nm), and crystallographic orientation scans—are provided in standard formats (CSV, .xlsx, .tdms) upon request. These files are structured to interface directly with statistical process control (SPC) platforms such as JMP, Minitab, or factory MES systems compliant with SEMI E10/E139. Traceability is ensured via unique wafer ID labels (ISO/IEC 15420-compliant 2D data matrix codes), linking each unit to its corresponding growth log, inspection report, and environmental monitoring records from the class 1000 cleanroom facility.
Applications
- Base template for p-GaN-based UV-C LED heterostructures emitting at 265–280 nm
- Buffer layer in vertical GaN power diodes targeting breakdown voltages >1.2 kV
- Substrate for monolithic integration of p-GaN gate electrodes in normally-off GaN-on-sapphire HEMTs
- Research platform for studying Mg acceptor activation kinetics under rapid thermal annealing (RTA)
- Calibration reference for in-situ reflectance anisotropy spectroscopy (RAS) and laser interferometric thickness monitoring
FAQ
Is this template suitable for direct metal contact deposition without surface pretreatment?
Yes—the as-grown Ga-face surface has been validated for Ti/Al/Ni/Au and Ni/Au ohmic metallization following standard lift-off and rapid thermal annealing (700 °C, 30 s, N₂). Contact resistivity values below 1×10⁻³ Ω·cm² have been reported in peer-reviewed studies using identical material specifications.
Can the wafer be cleaved or diced without delamination?
The AlGaN/sapphire interface exhibits strong interfacial adhesion (interfacial fracture toughness >0.8 J/m²), permitting standard mechanical dicing (e.g., diamond blade, 30 kHz) and laser scribing (355 nm UV) without layer peeling or chipping at the edge exclusion zone.
Do you provide cross-sectional TEM samples or EBIC characterization data?
Cross-sectional transmission electron microscopy (XTEM) sample preparation services and electron beam-induced current (EBIC) mapping reports are available as value-added options upon separate quotation; lead time is typically 10–12 working days from order confirmation.
