Acqiris SA248P 14-Bit Single-Channel 8 GS/s PCIe High-Speed Data Acquisition Card

Overview

The Acqiris SA248P is a high-fidelity, single-channel PCIe data acquisition card engineered for demanding time-domain signal capture in scientific instrumentation and industrial OEM systems. Built upon a high-speed analog front-end and a reconfigurable Xilinx Kintex-7 FPGA, the SA248P implements true real-time digitization at 8 gigasamples per second (GS/s) with 14-bit vertical resolution and 2.5 GHz analog bandwidth—enabling accurate reconstruction of fast transient waveforms, ultra-short optical pulses, and broadband RF signals. Its architecture follows the Couette-flow–inspired timing integrity principles common to high-stability oscilloscopic digitizers: low-jitter sampling clock distribution, deterministic trigger latency (<10 ns), and sub-sample interpolation capability via on-FPGA digital signal conditioning. The card is purpose-built for applications where temporal fidelity, repeatability under thermal drift, and deterministic I/O synchronization are critical—including swept-source optical coherence tomography (SS-OCT), time-of-flight LIDAR, distributed fiber Bragg grating (FBG) interrogation, time-resolved mass spectrometry, and high-speed photonic device characterization.

Key Features

• 14-bit ADC resolution with effective number of bits (ENOB) ≥12.3 at 1 GHz input frequency, verified per IEEE Std 1057 procedures
• Single-channel 8 GS/s real-time sampling, supporting record lengths up to 2³² samples (4.3 billion points) with on-card memory options of 4 GB or 8 GB DDR3
• 2.5 GHz analog bandwidth with flat frequency response (±1 dB) from DC to 2.2 GHz; 50 Ω input impedance, DC-coupled, with programmable input offset (±0.5 full-scale range)
• Onboard Xilinx Kintex-7 FPGA enabling real-time signal processing: hardware-accelerated averaging (AVG), decimation, peak detection, and user-defined FIR filtering
• Deterministic synchronization interface (CST): provides low-skew clock output and trigger strobes synchronized to acquisition start with <200 ps jitter
• PCI Express Gen2 x8 host interface delivering sustained throughput >3.2 GB/s; compatible with Windows (x64), Linux (kernel 4.15+), and real-time OS extensions
• IVI-compliant drivers (IVI-C and IVI.NET) with source-level API documentation, supporting traceable calibration metadata embedding and instrument state serialization

Sample Compatibility & Compliance

The SA248P accepts differential or single-ended voltage signals within ±0.5 V range (1 V full-scale), optimized for low-noise preamplified outputs from photodetectors, RF mixers, and piezoelectric transducers. Its DC-coupled 50 Ω input ensures compatibility with standard RF test fixtures and optical receiver modules used in OCT interferometers and coherent LIDAR receivers. The card meets CE EMC Class B and RoHS 3 compliance. For regulated environments—including medical device validation (IEC 62304), pharmaceutical analytical instrumentation (USP , ASTM E2500), and aerospace test benches—the driver stack supports configuration-controlled firmware updates, cryptographic signature verification, and 21 CFR Part 11–compliant audit trails when deployed with validated host software frameworks.

Software & Data Management

Auniontech provides a comprehensive SDK including C/C++ header libraries, .NET assemblies, MATLAB instrument drivers (with native MEX support), and LabVIEW VIs compliant with NI’s Instrument Driver Network (IDNet) standards. All APIs expose low-level register access for custom FPGA bitstream loading and DMA buffer management. Data files are saved in HDF5 format (version 1.12+) with embedded metadata: timestamp (PTPv2-synchronized if host supports it), calibration coefficients, trigger edge polarity, and FPGA processing configuration hash. Optional Acqiris Control Studio GUI enables rapid prototyping, multi-card synchronization setup, and real-time FFT/PSD visualization with export to CSV, MAT, or memory-mapped binary.

Applications

• Swept-Source OCT Systems: Captures full A-line waveforms at >100 kHz line rates with phase-stable sampling for dispersion compensation and complex conjugate suppression
• Fiber Optic Sensing Networks: Interrogates multiplexed FBG or interferometric sensors with picosecond-level timing resolution for acoustic emission localization
• Time-of-Flight LIDAR: Digitizes return pulses from 1550 nm pulsed lasers with sub-nanosecond rise-time preservation for centimeter-level ranging accuracy
• Mass Spectrometry Signal Chains: Interfaces directly with time-to-digital converters (TDCs) or fast electron multipliers for ion arrival time histogramming
• Semiconductor Parametric Test: Validates high-speed SERDES eye diagrams and jitter tolerance in 5G/mmWave IC validation platforms

FAQ

Does the SA248P support multi-card synchronization?
Yes—via the CST (Clock & Synchronization Trigger) interface, up to 8 cards can be phase-locked with <50 ps inter-card skew using a common reference clock and trigger distribution network.
Is FPGA bitstream customization available for OEM integration?
Auniontech provides documented HDL templates and synthesis toolchains (Vivado 2022.1+) for customer-defined logic insertion, subject to NDA and FPGA resource constraints.
What calibration documentation is included?
Each unit ships with NIST-traceable calibration certificate (ISO/IEC 17025 accredited lab), including ENOB vs. frequency plots, SFDR measurements, and timebase stability (Allan deviation at 1 s gate).