DOI (Low-Resistivity Diamond-on-Insulator Thin Film) by合肥科晶

Overview

The DOI (Diamond-on-Insulator) low-resistivity thin film is a high-performance semiconductor substrate engineered for advanced microelectronic, MEMS, and high-power device applications where thermal management, electrical isolation, and carrier mobility are critical. Unlike conventional SOI (Silicon-on-Insulator) wafers, the DOI structure integrates a thin, conductive diamond layer—deposited via microwave plasma chemical vapor deposition (MPCVD)—onto a thermally stable silicon dioxide insulating layer. This architecture leverages diamond’s exceptional thermal conductivity (>2000 W/m·K), wide bandgap (5.47 eV), and high breakdown field (>10 MV/cm), while maintaining compatibility with standard CMOS fabrication processes. The low resistivity (<0.1 Ω·cm) indicates intentional boron doping or defect engineering to support ohmic contact formation and lateral current spreading—making it suitable for RF power amplifiers, radiation-hardened sensors, and high-frequency heterojunction transistors.

Key Features

• 4-inch diameter silicon substrate with precise ±0.5° crystallographic orientation, ensuring uniform epitaxial growth and process repeatability across photolithography and etch steps.
• Dual-dielectric stack: 2 µm thick thermally grown SiO₂ base insulator combined with an additional 1 µm oxidation layer, optimized for dielectric strength (>600 V/µm) and interfacial trap density control.
• Low-resistivity polycrystalline diamond film deposited via MPCVD under controlled methane/hydrogen gas ratios and substrate biasing—enabling tunable carrier concentration without compromising structural integrity.
• Class 1000 cleanroom fabrication environment with final packaging in Class 100 cleanroom vacuum bags or single-wafer cassettes—minimizing particle contamination (<0.1 µm particles <10/cm²) and moisture-induced surface degradation.
• Surface roughness (Ra) maintained below 0.5 nm over full 4″ area, verified by atomic force microscopy (AFM), supporting sub-10 nm lithographic resolution and low-interface-state-density metal–diamond contacts.

Sample Compatibility & Compliance

The DOI wafer is compatible with standard front-end semiconductor processing tools, including sputter deposition systems (Ti/Pt/Au, Ni/Cr/Au), reactive ion etching (CHF₃/O₂ chemistry), and rapid thermal annealing (RTA) up to 900 °C in N₂ ambient. Its thermal expansion coefficient (3.5 × 10⁻⁶ /K) closely matches that of silicon, mitigating interfacial stress during thermal cycling. The product conforms to SEMI Standard M1–13 (Specification for Silicon Wafers) for dimensional tolerances and surface quality. While not certified to ISO 9001 at the wafer level, manufacturing documentation—including lot traceability, oxide thickness mapping (ellipsometry), and four-point probe resistivity maps—is provided per shipment to support GLP-compliant R&D workflows and internal qualification protocols.

Software & Data Management

As a passive substrate component, the DOI film does not incorporate embedded firmware or proprietary software. However, full metrology datasets—including cross-sectional TEM images, XRD rocking curves, Raman spectra (1332 cm⁻¹ diamond peak FWHM <2.5 cm⁻¹), and Van der Pauw resistivity maps—are delivered in standardized formats (CSV, TIFF, .tdms) upon request. These files are structured to integrate directly into LabArchives ELN, JMP Statistical Discovery, or MATLAB-based process control models. For customers operating under FDA 21 CFR Part 11 requirements, Kejing provides audit-ready calibration certificates for all characterization instruments used in release testing (e.g., calibrated ellipsometer model Woollam M-2000, certified by NIST-traceable standards).

Applications

• High-electron-mobility transistor (HEMT) platforms requiring self-heating mitigation in GaN-on-diamond configurations.
• Radiation-tolerant detector substrates for spaceborne particle tracking, leveraging diamond’s low displacement energy (43 eV) and absence of mid-gap states.
• Microheater arrays and MEMS resonators benefiting from diamond’s high Young’s modulus (1050 GPa) and low thermoelastic damping.
• Electrochemical biosensor platforms where low background current (<1 pA/cm² at 1 V bias) and electrochemical stability in PBS/acidic media are essential.
• Quantum sensing test vehicles using nitrogen-vacancy (NV⁻) centers, where shallow-implanted NV layers benefit from reduced phonon scattering due to the underlying oxide barrier.

FAQ

Is this DOI film compatible with direct e-beam lithography?
Yes—the diamond surface is hydrogen-terminated and exhibits consistent electron scattering behavior; optimal results are achieved using PMMA A4 resist with 20 keV acceleration voltage and dose calibration between 250–400 µC/cm².
Can the SiO₂ layer withstand HF-based wet etching?
The 2 µm SiO₂ layer provides robust resistance to buffered oxide etch (BOE, 6:1) for up to 90 seconds; undercut is limited to <50 nm under standard conditions, as confirmed by cross-sectional SEM.
What is the maximum recommended annealing temperature in air?
Annealing above 450 °C in ambient air initiates surface graphitization; for metallization integration, rapid thermal processing in forming gas (N₂/H₂, 5%) is recommended up to 750 °C for ≤60 seconds.
Do you supply pre-patterned DOI wafers?
Standard delivery is blank wafers; custom patterning (e.g., TiN gate electrodes, Cr/Au interconnects) is available under NRE agreement with mask set and process validation documentation.
Is there batch-to-batch resistivity variation?
Resistivity is controlled within ±0.02 Ω·cm across a production lot (n ≥ 25 wafers); full statistical process control (SPC) charts are included with each shipment.