Zurich Instruments HDAWG Series High-Density Arbitrary Waveform Generator

Overview

The Zurich Instruments HDAWG Series High-Density Arbitrary Waveform Generator is a precision signal synthesis platform engineered for demanding quantum, photonic, and high-frequency electronic applications. Unlike conventional function generators or basic AWGs, the HDAWG implements a true hardware-accelerated sequencer architecture—executing waveform playback, conditional branching, real-time oscillator parameter updates, and DIO-triggered event handling directly on FPGA. Its core measurement principle relies on direct digital synthesis (DDS) combined with high-fidelity analog output stages, enabling deterministic, low-jitter signal generation across nanosecond-scale temporal domains. With native 16-bit vertical resolution, 2.4 GSa/s sampling, and a 750 MHz small-signal bandwidth (0.8 Vpp into 50 Ω), the HDAWG delivers exceptional spectral purity and time-domain fidelity—critical for coherent control in superconducting qubits, trapped-ion systems, and ultrafast spectroscopy. The instrument supports both DC-coupled single-ended outputs and dual-marker synchronization per channel, making it suitable for complex multi-tone, multi-phase, and time-multiplexed stimulus protocols.

Key Features

• High-density channel architecture: 4-channel (HDAWG4) or 8-channel (HDAWG8) configurations, each with independent DC-coupled analog outputs and dual programmable markers
• Two operational output modes: Direct mode (0.8 Vpp, <300 ps rise time, ultra-low noise: 12 nV/√Hz) and amplified mode (0.2–5.0 Vpp, <550 ps rise time, optimized for drive strength)
• Hardware-based sequencer with 16,384 instruction capacity, supporting dynamic loops, conditional branches, real-time oscillator tuning, and integer arithmetic operations
• Sub-50 ns trigger-to-output latency and <20 ps inter-pair channel skew—enabling quantum feedback loops and time-critical closed-loop experiments
• Digital oscillators integrated per channel, allowing carrier generation independent of AWG waveform memory; supports full digital I/Q modulation when paired with HDAWG-MF option
• Scalable synchronization: Multiple HDAWG units automatically phase-lock via 10/100 MHz reference clocks; all channels maintain absolute temporal alignment (<50 ns inter-unit jitter)
• Comprehensive connectivity: VHDCI 68-pin DIO (32-bit, TTL), SMA-trigger inputs (50 Ω / 1 kΩ selectable), sampling clock I/O, and reference clock I/O—all accessible via front/rear panels

Sample Compatibility & Compliance

The HDAWG is designed for laboratory environments requiring strict adherence to electrical safety and electromagnetic compatibility standards. It complies with IEC 61010-1 for measurement, control, and laboratory equipment, rated for indoor use under Installation Category II and Pollution Degree 2. Its AC power input (100–240 V, ±10%, 50/60 Hz) ensures global operability without external transformers. While the HDAWG itself does not perform sample analysis, its output signals interface directly with cryogenic quantum devices, RF/microwave test fixtures, laser diode drivers, NMR probe circuits, and semiconductor parametric testers—systems routinely validated against ASTM E29, ISO/IEC 17025, and IEEE Std 1139 for timing accuracy and waveform integrity. All firmware and LabOne software updates are version-controlled and traceable, supporting GLP/GMP-aligned audit trails when used in regulated R&D environments.

Software & Data Management

LabOne® serves as the unified software environment for configuration, visualization, and automation. Its browser-based UI eliminates OS-specific dependencies and provides real-time oscilloscope-style waveform monitoring, FFT spectrum analysis, and parameter sweeps. The LabOne AWG Compiler translates high-level sequence definitions—including nested loops, variable delays, and DIO-dependent branching—into optimized FPGA microcode with deterministic execution. Scripting APIs for Python, MATLAB, LabVIEW, C, and .NET enable integration into existing test automation frameworks. All waveform data, sequence logic, and instrument settings are stored in human-readable JSON format, facilitating version control, reproducibility, and collaborative experiment sharing. LabOne supports 21 CFR Part 11-compliant user authentication, electronic signatures, and audit logging when deployed on secured enterprise servers—meeting requirements for regulated semiconductor characterization and medical device R&D.

Applications

• Quantum computing: Coherent qubit control with sub-50 ns feedback latency; synchronized multi-qubit gate pulses; real-time phase adjustment for error correction protocols
• Nuclear magnetic resonance (NMR) & optical spectroscopy: Arbitrary pulse shaping across µs–s timescales; variable-rate sampling for accelerated 2D correlation experiments; multi-frequency excitation via digital I/Q modulation
• Semiconductor testing: High-throughput parametric testing using nested waveform iteration; dynamic sequence switching for corner-case stress profiling; MIMO-compatible stimulus generation
• Lidar & phased-array radar: Precise chirp generation, beam-steering waveform synthesis, and multi-channel coherence maintenance across extended arrays
• Ultrafast photonics: Pump-probe delay scanning, electro-optic modulator biasing, and cavity ring-down signal synthesis with picosecond-level timing resolution

FAQ

What is the maximum number of synchronized HDAWG units supported in a single LabOne session?
LabOne supports up to 8 HDAWG instruments operating as a unified multi-channel system, with all outputs phase-locked and sequenced from a single UI or API instance.
Can the HDAWG generate waveforms with variable sampling rates within a single sequence?
Yes—the sequencer supports dynamic sampling rate changes via real-time clock divider updates, enabling adaptive acquisition and stimulus protocols without host intervention.
Is the HDAWG compatible with third-party digitizers or lock-in amplifiers?
Yes—via standardized trigger lines, reference clocks, and DIO handshaking, the HDAWG integrates natively with Zurich Instruments’ UHF series (e.g., UHFLI, UHFQA) and other vendor instruments supporting TTL or LVDS timing interfaces.
Does the HDAWG-ME memory expansion option increase per-channel or total waveform memory?
The HDAWG-ME option extends waveform memory to 500 MSa per channel, independent of other channels—preserving full 16-bit resolution and timing granularity.
How is phase coherence maintained across multiple HDAWG units during long-duration experiments?
All units share a common 10/100 MHz reference clock and employ FPGA-based phase-locked loops (PLLs) to eliminate drift; inter-unit timing jitter remains below 50 ns over 24-hour continuous operation.