Midas VPE HF Vapor Phase Etcher

Overview

The Midas VPE HF Vapor Phase Etcher is a precision-engineered semiconductor wet process instrument designed for controlled, uniform, and residue-free silicon dioxide (SiO₂) removal via anhydrous hydrogen fluoride (HF) vapor-phase chemistry. Unlike conventional liquid-phase HF etching—where capillary forces induce stiction and structural collapse in released MEMS devices—the VPE operates on a thermodynamically balanced vapor-phase mechanism. It leverages the well-established two-step surface reaction: first, adsorbed water forms silanol (Si–OH) groups on the SiO₂ surface; second, gaseous HF reacts with these groups to yield volatile SiF₄ and H₂O. Critically, water serves both as an initiator and a reaction product, enabling precise kinetic control through substrate temperature regulation (35–60 °C). This principle eliminates interfacial tension during release, making the VPE indispensable for high-aspect-ratio MEMS fabrication, SOI-based device dicing-free release, and single-sided thinning of oxide layers—without compromising structural integrity or requiring surfactants or supercritical drying.

Key Features

• Integrated temperature-controlled lid with embedded heating elements for direct wafer thermal management
• Dual clamping options: mechanical clamping via rear-access torque-adjustable nuts (non-HF-exposed) or electrostatic chuck (ESC) for sub-10 mm die and full wafers (Ø150 mm standard)
• Backside protection design: only the front surface contacts HF vapor; the wafer back remains inert and unetched
• Gravity-driven, valve-isolated HF reservoir system enables safe manual transfer, reuse, and long-term acid conservation
• Optional Temperature-Controlled Reaction Chamber (TRC): actively regulates liquid HF bath temperature to suppress ambient drift and ensure inter-wafer reproducibility
• Compact footprint (< 0.5 m²) and modular architecture facilitate seamless integration into existing cleanroom wet benches or Class 100/ISO 5 process lines

Sample Compatibility & Compliance

The VPE supports silicon wafers up to Ø150 mm, individual dies (>10 mm length), and patterned SOI substrates. It is fully compatible with standard photolithography resists (e.g., AZ® series), hard masks (SiNₓ, TaN), and release-ready MEMS structures featuring sacrificial SiO₂ layers. The system conforms to ISO 14644-1 (cleanroom classification), SEMI S2-0215 (safety guidelines for HF handling), and OSHA 29 CFR 1910.1200 (Hazard Communication Standard). All fluid-contact components are constructed from PFA, quartz, and electropolished 316L stainless steel—ensuring chemical resistance and minimizing metallic contamination per SEMI F57 specifications. For regulated environments, optional audit trail logging and user access controls support alignment with FDA 21 CFR Part 11 and GLP/GMP documentation requirements.

Software & Data Management

The VPE operates via a dedicated touchscreen interface with embedded programmable logic controller (PLC) firmware. Process parameters—including setpoint temperature, etch duration, HF reservoir level, and valve sequencing—are stored in non-volatile memory with timestamped logs. Optional Ethernet/IP connectivity enables remote monitoring, SCADA integration, and export of CSV-formatted run records for SPC analysis. All data entries include operator ID, date/time stamp, and system status flags—supporting traceability in quality-critical applications such as automotive-grade MEMS or medical sensor manufacturing. No proprietary software license is required; configuration files are editable via standard industrial protocols (Modbus TCP).

Applications

• Stiction-free release of high-aspect-ratio MEMS actuators, gyroscopes, and pressure sensors using sacrificial SiO₂ layers
• Dicing-free liberation of microstructures on SOI wafers post-DRIE, eliminating kerf loss and edge chipping
• Controlled thinning of gate oxides or interlayer dielectrics with tunable rates from 0 to ~30 µm/h
• Single-sided SiO₂ etching with inherent backside passivation—ideal for asymmetric device architectures
• Process development for low-k dielectric patterning where liquid-phase etchants cause pore collapse or delamination

FAQ

How does the VPE achieve stiction-free MEMS release without supercritical drying?

By operating in the vapor phase, the VPE avoids liquid meniscus formation entirely. Etching occurs across a sub-nanometer adsorbed water layer, eliminating capillary forces that cause adhesion during drying.

What is the typical etch rate range and its temperature dependence?

Etch rates span 0–30 µm/h, controllable primarily via substrate temperature (35–60 °C). At ≥50 °C, evaporation of the adsorbed water layer suppresses reaction kinetics, effectively halting etching.

Can the same HF batch be reused across multiple runs?

Yes. The closed reservoir system isolates HF from ambient moisture and particulates. Acid lifetime exceeds 50–100 wafers depending on surface area and exposure time—verified by periodic titration per ASTM D974.

Is the VPE compatible with automated factory interfaces (SECS/GEM)?

Standard models support discrete I/O signals for start/stop/pause; SECS/GEM integration is available via optional hardware module compliant with SEMI E30/E37 standards.

What safety certifications apply to HF vapor containment?

The sealed reaction chamber meets EN 61000-6-4 (EMC) and includes redundant HF gas sensors (0–10 ppm range) with automatic vent purge activation per IEC 61508 SIL 2 functional safety requirements.